布局布线和时序分析
笔记本


2020-07-30 16:45:22report_app_options报出icc2的options走来走去116.236.47.26

在脚本中间报出这些option有利于debug:

Name
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ccd.ignore_scan_reset_for_boundary_identification
ccd.max_postpone
ccd.max_prepone
ccd.optimize_boundary_timing
ccd.skip_path_groups
ccd.targeted_ccd_path_groups
clock_opt.flow.enable_ccd
clock_opt.flow.enable_clock_power_recovery
clock_opt.hold.effort
cts.common.auto_exception_macro_balance_point
cts.common.max_fanout
cts.common.max_net_length
cts.common.user_instance_name_prefix
cts.compile.enable_local_skew
cts.compile.size_pre_existing_cell_to_cts_references
cts.optimize.enable_local_skew
file.tlup.max_preservation_size
mv.pg.default_power_supply_net_name
mv.pg.default_power_supply_port_name
mv.upf.enable_pg_pin_reconnection
opt.area.effort
opt.common.buffer_area_effort
opt.common.max_fanout
opt.common.max_net_length
opt.common.use_route_aware_estimation
opt.common.user_instance_name_prefix
opt.dft.clock_aware_scan_reorder
opt.port.eliminate_verilog_assign
opt.power.effort
opt.power.mode
opt.tie_cell.max_fanout
opt.timing.effort
place.coarse.congestion_driven_max_util
place.coarse.continue_on_missing_scandef
place.coarse.enable_enhanced_soft_blockages
place.coarse.fix_hard_macros
place.coarse.icg_auto_bound
place.coarse.low_power_placement
place.coarse.max_density
place.coarse.pin_density_aware
place.coarse.spread_repeater_paths
place.coarse.tns_driven_placement
place_opt.flow.clock_aware_placement
place_opt.flow.do_path_opt
place_opt.flow.enable_ccd
place_opt.flow.optimize_layers
place_opt.initial_drc.global_route_based
plan.macro.macro_place_only
plan.pgroute.disable_floating_removal
plan.pgroute.disable_trimming
plan.pgroute.disable_via_creation
plan.pgroute.drc_check_fast_mode
plan.place.auto_generate_soft_blockage_channel_width
power.default_toggle_rate
power.default_toggle_rate_reference_clock
power.enable_activity_persistency
refine_opt.flow.optimize_layers
route.common.concurrent_redundant_via_mode
route.common.connect_within_pins_by_layer_name
route.common.eco_route_concurrent_redundant_via_mode
route.common.extra_nonpreferred_direction_wire_cost_multiplier_by_layer_name
route.common.global_max_layer_mode
route.common.global_min_layer_mode
route.common.min_edge_offset_for_macro_pin_connection_by_layer_name
route.common.min_shield_length_by_layer_name
route.common.number_of_secondary_pg_pin_connections
route.common.post_detail_route_fix_soft_violations
route.common.post_eco_route_fix_soft_violations
route.common.post_group_route_fix_soft_violations
route.common.post_incremental_detail_route_fix_soft_violations
route.common.rotate_default_vias
route.common.route_top_boundary_mode
route.common.single_connection_to_pins
route.common.wide_macro_pin_as_fat_wire
route.detail.default_port_external_gate_size
route.detail.eco_max_number_of_iterations
route.detail.generate_extra_off_grid_pin_tracks
route.detail.optimize_wire_via_effort_level
route.detail.repair_shorts_over_macros_effort_level
route.detail.use_default_width_for_min_area_min_len_stub
route.detail.var_spacing_to_same_net
route.global.double_pattern_utilization_by_layer_name
route.global.effort_level
route.global.via_cut_modeling
shell.common.report_default_significant_digits
time.aocvm_analysis_mode
time.aocvm_enable_analysis
time.enable_clock_to_data_analysis
time.ocvm_enable_distance_analysis
time.port_slew_derate_from_library
time.port_slew_lower_threshold_fall
time.port_slew_lower_threshold_rise
time.port_slew_upper_threshold_fall
time.port_slew_upper_threshold_rise
time.remove_clock_reconvergence_pessimism
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