define_user_attribute -classes cell -type string -one_of {true false} -name is_ram_clk_point

set j_dff_list [get_flat_cells -hier -filter "ref_name =~ *DFF* " ]
#set j_dff_list [get_cells u_axi_count/sw_enc_axi_total_pending_reg_7_ ]
#set j_dff_list [get_cells u_core0/u_fifo_ram_hub_ch_to_sao_enc_f/fifo_read_data_i_reg_0__64_ ]

foreach_in_coll j_obj $j_dff_list {
	set j_inst_name [get_attr $j_obj full_name ]
	set j_clk_pin [get_pins -of $j_obj -filter "is_clock_pin == true" ]
	set j_icg_count [sizeof_coll [filter [all_fanin -flat -only_cells -to $j_clk_pin  ] "is_integrated_clock_gating_cell == true" ] ]
	if { $j_icg_count == 1 } {
		set j_in_list [get_attr [all_fanin -to $j_clk_pin -flat -levels 1 -only_cells ] full_name ]
		set j_in_icg [lindex $j_in_list 1 ]
		set j_in_icg_name [get_attr $j_in_icg full_name ]
		if { [get_attr $j_in_icg is_integrated_clock_gating_cell ] == true } {
			puts $j_in_icg_name
#			change_selection -add [get_cells $j_in_icg_name ]
			set_attr [get_cells $j_in_icg_name ] -name is_ram_clk_point -value true
		}
	}
	if { $j_icg_count == 2 } {
		set j_in_list [get_attr [all_fanin -to $j_clk_pin -flat -levels 2 -only_cells ] full_name ]
		set j_in_icg1 [lindex $j_in_list 1 ]
		set j_in_icg2 [lindex $j_in_list 2 ]
		set j_in_icg2_name [get_attr $j_in_icg2 full_name ]
		if { [get_attr $j_in_icg1 is_integrated_clock_gating_cell ] == true \
		  && [get_attr $j_in_icg2 is_integrated_clock_gating_cell ] == true } {
			puts $j_in_icg2_name
#			change_selection -add [get_cells $j_in_icg2_name ]
			set_attr [get_cells $j_in_icg2_name ] -name is_ram_clk_point -value true
		}
	}
}